MARTE-Based Modeling and Analysis for Real-Time Neuromorphic Computing in Embedded Systems
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Abstract
With the rapid advancement of deep learning, Spiking Neural Networks (SNNs) have attracted growing interest due to their low power consumption, sensitivity to temporal information, and biological plausibility. However, deploying SNNs in resource-constrained, real-time embedded environments presents significant challenges--chiefly their complex training processes, limited hardware acceleration support, and the difficulty of performing scheduling analysis. This paper presents an integrated modeling and scheduling analysis framework for SNNs based on the MARTE (Modeling and Analysis of Real-Time and Embedded Systems) standard defined by the OMG. Key SNN components--such as neurons, synapses, and spike events--are mapped to schedulable tasks and communication resources within the MARTE profile. Leveraging the Papyrus MARTE tool, we conduct simulation and verification on a heterogeneous embedded platform comprising multi-core ARM and DSP processors. Experimental results show that the proposed framework effectively satisfies end-to-end latency and power constraints, while significantly reducing system integration risks and enhancing design efficiency. Finally, we discuss future research directions, including support for more complex SNN architectures, advanced scheduling strategies, deployment on heterogeneous and distributed platforms, and formal verification for safety-critical applications.
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References
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Cited By (1)
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Samia Akhtar, Shabib Aftab, Muhammad Anwaar Saeed, Usama Ahmed. .
2025 6th International Conference on Innovative Computing (ICIC), 2025 .
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Cite This Article
TY - JOUR AU - Wu, Liangshun AU - Tao, Tao PY - 2025 DA - 2025/08/15 TI - MARTE-Based Modeling and Analysis for Real-Time Neuromorphic Computing in Embedded Systems JO - ICCK Journal of Software Engineering T2 - ICCK Journal of Software Engineering JF - ICCK Journal of Software Engineering VL - 1 IS - 1 SP - 9 EP - 16 DO - 10.62762/JSE.2025.495949 UR - https://www.icck.org/article/abs/JSE.2025.495949 KW - spiking neural network (SNN) KW - MARTE KW - embedded system KW - real-time scheduling KW - model-driven engineering (MDE) KW - energy optimization KW - papyrus MARTE KW - system modeling and verification AB - With the rapid advancement of deep learning, Spiking Neural Networks (SNNs) have attracted growing interest due to their low power consumption, sensitivity to temporal information, and biological plausibility. However, deploying SNNs in resource-constrained, real-time embedded environments presents significant challenges--chiefly their complex training processes, limited hardware acceleration support, and the difficulty of performing scheduling analysis. This paper presents an integrated modeling and scheduling analysis framework for SNNs based on the MARTE (Modeling and Analysis of Real-Time and Embedded Systems) standard defined by the OMG. Key SNN components--such as neurons, synapses, and spike events--are mapped to schedulable tasks and communication resources within the MARTE profile. Leveraging the Papyrus MARTE tool, we conduct simulation and verification on a heterogeneous embedded platform comprising multi-core ARM and DSP processors. Experimental results show that the proposed framework effectively satisfies end-to-end latency and power constraints, while significantly reducing system integration risks and enhancing design efficiency. Finally, we discuss future research directions, including support for more complex SNN architectures, advanced scheduling strategies, deployment on heterogeneous and distributed platforms, and formal verification for safety-critical applications. SN - 3069-1834 PB - Institute of Central Computation and Knowledge LA - English ER -
@article{Wu2025MARTEBased,
author = {Liangshun Wu and Tao Tao},
title = {MARTE-Based Modeling and Analysis for Real-Time Neuromorphic Computing in Embedded Systems},
journal = {ICCK Journal of Software Engineering},
year = {2025},
volume = {1},
number = {1},
pages = {9-16},
doi = {10.62762/JSE.2025.495949},
url = {https://www.icck.org/article/abs/JSE.2025.495949},
abstract = {With the rapid advancement of deep learning, Spiking Neural Networks (SNNs) have attracted growing interest due to their low power consumption, sensitivity to temporal information, and biological plausibility. However, deploying SNNs in resource-constrained, real-time embedded environments presents significant challenges--chiefly their complex training processes, limited hardware acceleration support, and the difficulty of performing scheduling analysis. This paper presents an integrated modeling and scheduling analysis framework for SNNs based on the MARTE (Modeling and Analysis of Real-Time and Embedded Systems) standard defined by the OMG. Key SNN components--such as neurons, synapses, and spike events--are mapped to schedulable tasks and communication resources within the MARTE profile. Leveraging the Papyrus MARTE tool, we conduct simulation and verification on a heterogeneous embedded platform comprising multi-core ARM and DSP processors. Experimental results show that the proposed framework effectively satisfies end-to-end latency and power constraints, while significantly reducing system integration risks and enhancing design efficiency. Finally, we discuss future research directions, including support for more complex SNN architectures, advanced scheduling strategies, deployment on heterogeneous and distributed platforms, and formal verification for safety-critical applications.},
keywords = {spiking neural network (SNN), MARTE, embedded system, real-time scheduling, model-driven engineering (MDE), energy optimization, papyrus MARTE, system modeling and verification},
issn = {3069-1834},
publisher = {Institute of Central Computation and Knowledge}
}
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